1. Field of Invention
The present invention relates to a semiconductor device and a method of operating the same. More specifically, the present invention relates to a semiconductor device performing a multi-plane erase operation.
2. Discussion of Related Art
A semiconductor memory device includes a memory cell array in which data is stored, a peripheral circuit configured to perform erase operations, program operations, and read operations on the memory cell array, and a control circuit for controlling the peripheral circuit. A plurality of planes are included in the memory cell array, and a plurality of memory blocks are included in each of the plurality of planes.
In order to reduce the operating time of the semiconductor device, a multi-plane erase operation may be performed. During a multi-plane erase operation, multiple planes may be erased simultaneously.
During a multi-plane erase operation, when an erase verifying operation fails on some of the planes, the normal planes for which the erase verifying operation was successful are also determined to have failed due to the failure of the erase verifying operation on some of the planes. The rest of the normal planes that were identified as having failed may not be used due to the failure of the erase verifying operation on some of the planes.